This paper proposes the usage of adaptive delay bank (ADB) based on cascaded delayed signal cancellation (CDSC) structure for selective elimination of the harmonics in the synchronous reference frame phase locked loop (SRF-PLL) structures. The ADB is inserted inside the SRF-PLL structure and it is frequency adaptive, which is the advantage over CDSC structures which are used in PLL as pre-filters, not being adaptive at all. Detailed mathematical analysis and simulation results confirmed suggested method for selective harmonic elimination in PLL.
