Analysis of discretization methods applied on DCSOGI block as part of SRF-PLL structure
Phase Locked Loop (PLL) is wide used for grid parameters estimation, as well for grid-converters synchronization. Key block at single-phase Synchronous Reference Frame PLL (SRF-PLL) structure is two-phase generator which is used for generation of two quadrature signals, which are necessary for SRF block. One of the issues that could appear during estimation of grid parameters is appearance of DC offset in measured grid voltage. In this paper is described second order generalized integrator (SOGI) which is capable to fully reject DC offset and noise which could appear in measured input grid voltage. This two-phase generator is named DC-SOGI. Analog DC-SOGI is made of two second order filters. While these structures are mostly digitally implemented, then it is interesting to analyze discretization method and sampling time impact on two-phase generator. Simulation results confirm given assumption.
SRF-PLL; DC-SOGI; discretisation method; sampling time